Regviz

Silicon Labs /EFR32ZG23B010F512IM48 /RAC_S /PRECTRL

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Interpret as PRECTRL

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https://regviz.com/r/Silicon Labs/EFR32BG22C224F512GM32/RAC_S/PRECTRL#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (not_forced)PREBYPFORCE 0 (v1p61)PREREGTRIM 0 (v0p675)PREVREFTRIM

PREBYPFORCE=not_forced, PREVREFTRIM=v0p675, PREREGTRIM=v1p61

Fields

PREBYPFORCE

PREBYPFORCE

0 (not_forced): undefined

1 (forced): undefined
PREREGTRIM

PREREGTRIM

0 (v1p61): undefined

1 (v1p68): undefined

2 (v1p74): undefined

3 (v1p80): undefined

4 (v1p86): undefined

5 (v1p91): undefined

6 (v1p96): undefined

7 (v2p00): undefined
PREVREFTRIM

PREVREFTRIM

0 (v0p675): undefined

1 (v0p688): undefined

2 (v0p700): undefined

3 (v0p713): undefined

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data